A multi-input-multi-output controller for the plasma vertical stabilization was implemented and installed on the Joint European Torus tokamak. The system can attain a control-cycle time of approximately 30µs using x 86 multi-core processors but targets 10µs via Field Programmable Gate Array (FPGA) based processing. The hardware, complying with the Advanced Telecommunications Computing Architecture (ATCA) standard, was in-house designed and implemented to achieve the required performance and consists of: A total of 6 synchronized ATCA control boards, each one with 32 analog input channels which provide up to 192 galvanically-isolated channels, used mainly for magnetic measurements. Each board contains an FPGA, which performs digital signal processing and includes a PCI Express communications interface; An ATCA rear transition module, which comprises up to 8 galvanically-isolated analog output channels to control the fast radial field amplifier (±10kV, ±2.5kA). An optical link to digitally control the enhanced radial field amplifier (±12kV, ±5kA). Up to 8 EIA-485 digital inputs for timing and monitoring information; An ATCA processor blade with a quad-core processor, where the control algorithm is presently running, connected to the 6 ATCA control boards through the PCI Express interface. All FPGAs are interconnected by low-latency links via the ATCA full-mesh backplane, allowing all channel data to be available on each FPGA running an upcoming distributed control algorithm.