For the Tore Supra interferometer phase measurements, CEA developed electronics using FPGA processors. The embedded algorithm can correct the fringe jumps. For comparison, the electronics ran at JET during the 2009 campaign. A first analysis concluded that the electronics was not correcting all the fringe jumps. Analysis of the failures led to improvements in the algorithm, which was tested during the rest of the campaign. In this article, we evaluate the performance increases. From the analysis of the remaining faults, further improvements are discussed for designing future boards that are foreseen for JET, using the second wavelength and the Cotton Mouton effect information.